Impact of Varying Fin Width in an n-FinFET at 20nm Gate Length

نویسندگان

  • Kanika Mishra
  • Ravinder Singh Sawhney
  • Scott E. Thompson
  • Srivatsan Parthasarathy
  • Gordon E. Moore
  • J. P. Colinge
  • Bin Yu
  • Leland Chang
  • Shibly Ahmed
  • Haihong Wang
  • Scott Bell
  • Chih-Yuh Yang
  • Cyrus Tabery
  • Chau Ho
  • Qi Xiang
  • Tsu-Jae King
  • Jeffrey Bokor
  • Chenming Hu
  • Ming-Ren Lin
  • David Kyser
  • A. Mercha
  • B. Parvais
  • J. Loo
  • C. Gustin
  • M. Dehan
  • N. Collaert
  • M. Jurczak
  • G. Groeseneken
  • Flavia Princess Nesamani
  • Geethanjali Raveendran
  • Lakshmi Prabha
  • Wen-Chin Lee
  • Jakub Kedzierski
  • Hideki Takeuchi
  • Kazuya Asano
  • Charles Kuo
  • Erik Anderson
  • S. L. Tripathi
چکیده

A double gate FinFET can reduce drain induced barrier lowering and improve threshold (short channel effects). In this paper, a very important geometrical parameter, that is, the fin width of a FinFET has been analyzed. In this article, a double gate n channel FinFET with a gate length of 20nm has been reported. The transfer characteristics of the FinFET at various fin widths have been obtained at a supply voltage of 0. 1 V. A comparison is then made between the transfer characteristics of various fin widths. It is observed that, at greater fin widths the drain current also increases as compared to that at shorter fin widths. Thus an increase in device performance is expected, but at the cost of increase in short channel effects. All the simulations have been performed in visual TCAD (Tiber CAD).

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تاریخ انتشار 2015